Multi Channel DMA for PCI Express* Intel® FPGA IP Design Example User Guide

ID 683517
Date 12/01/2021
Public

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Document Table of Contents

2.1. Design Example Overview

The Multi Channel DMA for PCI Express IP Design Examples demonstrate a Multi Channel DMA solution for Intel® Stratix® 10 GX/MX devices using the H-Tile PCIe Gen3 hard IP, Intel® Stratix® 10 DX devices using the P-Tile PCIe Gen4 hard IP, and Intel® Agilex™ devices using the P-Tile or F-Tile PCIe Gen4 Hard IP and soft IP implemented in the FPGA fabric.

You can generate the design example from the Example Designs tab of the Multi Channel DMA for PCI Express IP Parameter Editor. The desired user interface type, either Avalon-ST or Avalon-MM, can be chosen. You can allocate up to 2048 DMA channels (with a maximum of 512 channels per function) when the Avalon-MM interface type or Avalon-ST 1-port interface is selected. For the Avalon-ST 4-port Interface, one channel is allocated per port.

Table 2.  Multi Channel DMA for PCI Express* IP Design Example Variants
Design Example Configuration Simulation Driver Support
H-Tile P-Tile F-Tile
AVMM DMA

User Mode: Multi channel DMA

Interface Type: Avalon-MM

Number of Ports: 1

SR-IOV Support: No

Total Channels Supported: up to 512 channels

Yes up to 512 channels Simulator: VCS, Questa*-Intel® FPGA Starter EditionQuestaSim* (H-Tile only), Xcelium* (H-Tile only)
  • Custom
  • DPDK
  • Kernel Mode

User Mode: Multi channel DMA

Interface Type: Avalon-MM

Number of Ports: 1

SR-IOV Support: Yes 1

Total Channels Supported: up to 2K channels

One Physical Function and its Virtual Functions 2 Simulator: VCS, QuestaSim* (H-Tile only), Xcelium (H-Tile only) Not Supported
  • Custom
  • DPDK

User Mode: BAM+ MCDMA

Interface Type: Avalon-MM

Number of Ports: 1

SR-IOV Support: No

Total Channels Supported: up to 512 channels

Yes up to 512 channels Simulator: VCS, QuestaSim* (H-Tile only), Xcelium (H-Tile only)
  • Custom
  • DPDK
  • Kernel Mode

User Mode: BAM+ MCDMA

Interface Type: Avalon-MM

Number of Ports: 1

SR-IOV Support: Yes1

Total Channels Supported: up to 2K channels2

One Physical Function and its Virtual Functions Simulator: VCS, QuestaSim* (H-Tile only), Xcelium (H-Tile only) Not Supported
  • Custom
  • DPDK
Device-side Packet loopback

User Mode: Multi channel DMA

Interface Type: Avalon-ST

Number of Ports: 4

SR-IOV Support: No

Total Channels Supported: 1 Channel per port

One channel per port Simulator: VCS, QuestaSim* (H-Tile only), Xcelium (H-Tile only)
  • Custom
  • DPDK
  • Kernel Mode

User Mode: Multi channel DMA

Interface Type: Avalon-ST

Number of Ports: 1

SR-IOV Support: No

Total Channels Supported: up to 512 channels2

Yes up to 512 channels Simulator: VCS, QuestaSim* (H-Tile only), Xcelium (H-Tile only)
  • Custom
  • DPDK
  • Kernel Mode
  • Netdev (Support four PFs, one channel per PF)

User Mode: Multi channel DMA

Interface Type: Avalon-ST

Number of Ports: 1

SR-IOV Support: Yes

Total Channels Supported: up to 2K channels2

One Physical Function and its Virtual Functions Simulator: VCS, QuestaSim* (H-Tile only), Xcelium (H-Tile only) Not Supported
  • Custom
  • DPDK
Packet Generate/Check

User Mode: Multi channel DMA

Interface Type: Avalon-ST

Number of Ports: 4

SR-IOV Support: No

Total Channels Supported: 1 channel per port

One channel per port Simulator: VCS, QuestaSim* (H-Tile only), Xcelium (H-Tile only)
  • Custom
  • DPDK
  • Kernel Mode

User Mode: Multi channel DMA

Interface Type: Avalon-ST

Number of Ports: 1

SR-IOV Support: No

Total Channels Supported: up to 512 channels

Yes up to 512 channels Simulator: VCS, QuestaSim* (H-Tile only), Xcelium (H-Tile only)
  • Custom
  • DPDK
  • Kernel Mode

User Mode: Multi channel DMA

Interface Type: Avalon-ST

Number of Ports: 1

SR-IOV Support: Yes1

Total Channels Supported: up to 2K channels2

One Physical Function and its Virtual Functions Simulator: VCS, QuestaSim* (H-Tile only), Xcelium (H-Tile only) Not Supported
  • Custom
  • DPDK
PIO using MQDMA Bypass mode

User Mode: Multi channel DMA

Interface Type: Avalon-ST

Number of Ports: 4

SR-IOV Support: No

Yes Simulator: VCS, QuestaSim*, Xcelium (H-Tile only)
  • Custom
  • DPDK
  • Kernel Mode

User Mode: Multi channel DMA

Interface Type: Avalon-ST

Number of Ports: 1

SR-IOV Support: No

Yes Simulator: VCS, QuestaSim*, Xcelium (H-Tile only)
  • Custom
  • DPDK
  • Kernel Mode

User Mode: BAM+ MCDMA

Interface Type: Avalon-ST

Number of Ports: 1

SR-IOV Support: No

Yes Simulator: VCS, QuestaSim*, Xcelium (H-Tile only)
  • Custom
  • DPDK
  • Kernel Mode

User Mode: BAM+ MCDMA

Interface Type: Avalon-ST

Number of Ports: 4

SR-IOV Support: No

Yes Simulator: VCS, QuestaSim*, Xcelium (H-Tile only)
  • Custom
  • DPDK
  • Kernel Mode

User Mode: Bursting Master

Interface Type: Avalon-MM

Number of Ports: N/A

SR-IOV Support: No

Yes Simulator: VCS, QuestaSim*, Xcelium (H-Tile only)
  • Custom
  • DPDK
  • Kernel Mode

User Mode: BAM+BAS

Interface Type: Avalon-MM

Number of Ports: N/A

Yes Simulator: VCS, QuestaSim*, Xcelium (H-Tile only)
  • Custom
  • DPDK
  • Kernel Mode

User Mode: BAM+ MCDMA

Interface Type: Avalon-MM

Number of Ports: N/A

Yes Simulator: VCS, QuestaSim*, Xcelium (H-Tile only)
  • Custom
  • DPDK
  • Kernel Mode
Traffic Generator/Checker

User Mode: BAM+BAS Interface

Type: Avalon-MM

Number of Ports: N/A

SR-IOV Support: No

Yes Simulator: VCS, Xcelium (H-Tile only)
  • Custom
  • DPDK
  • Kernel Mode

User Mode: BAM+BAS Interface

Type: Avalon-MM

Number of Ports: N/A

SR-IOV Support: Yes1

Not Supported3
  • Custom
  • DPDK
1 Refer to P-tile Avalon® Streaming Intel® FPGA IP for PCI Express* User Guide for supported physical function or virtual function combinations.
2 512 channels per function
3 For more detailed simulators support availability, please refer to and

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