Intel® Quartus® Prime Standard Edition User Guide: Partial Reconfiguration Intel® FPGA IP

ID 683404
Date 4/18/2019

1.3.1. PR Bitstream Compression and Encryption ( Intel® Arria® 10 Designs)

You can compress and encrypt the base bitstream and the PR bitstream for your PR project using options available in the Intel® Quartus® Prime software.

Compress the base and PR programming bitstreams independently, based on your design requirements. When encrypting only the base image, specify whether or not to encrypt the PR images. The following guidelines apply to PR bitstream compression and encryption:

  • You can encrypt the PR images only when the base image is encrypted.
  • The Encryption Key Programming (.ekp) file generates when encrypting the base image and must be used for encrypting the PR bitstream.
  • When you compress the bitstream, present each PR_DATA[15:0] word for exactly four clock cycles.

For partial reconfiguration with the PR Controller IP core, specify enhanced compression by turning on the Enhanced compression option when specifying the parameters in the IP Catalog or Platform Designer parameter editors.

Note: You cannot use encryption with enhanced compression simultaneously.
Table 1.  Partial Reconfiguration Clock Requirements for Bitstream Compression

Timing Parameters

Value (clock cycles)

PR_READY to first data

4 (exact)

PR_ERROR to last clock

80 (minimum)

PR_DONE to last clock

80 (minimum)


8 (maximum)