1.1. Software and Hardware Requirements
1.2. Download and Install the Tutorial Design Files
1.3. Open the Tutorial Project
1.4. Creating Qsys Systems
1.5. Assemble a Hierarchical System
1.6. Viewing the Memory Tester System in Qsys
1.7. Compiling and Downloading Software to a Development Board
1.8. Debugging Your Design
1.9. Verifying Hardware in System Console
1.10. Simulating Custom Components
1.11. View a Diagram of the Completed System
1.4.1.1. Create a New Qsys System and Set up the Clock Source
1.4.1.2. Add a Pipeline Bridge
1.4.1.3. Add a Custom Pattern Generator
1.4.1.4. Add a PRBS Pattern Generator
1.4.1.5. Add a Two-to-One Streaming Multiplexer
1.4.1.6. Verify the Memory Address Map
1.4.1.7. Connect the Reset Signals
1.4.1.8. Save the System
1.4.2.1. Create a New Qsys System and Set Up the Clock Soource
1.4.2.2. Add a Pipeline Bridge
1.4.2.3. Add a Custom Pattern Checker
1.4.2.4. Add the PRBS Pattern Checker
1.4.2.5. Add a One-to-Two Streaming Demultiplexer
1.4.2.6. Verify the Memory Address Map
1.4.2.7. Connect the Reset Signals
1.4.2.8. Save the System
1.4.1.7. Connect the Reset Signals1.4.2.7. Connect the Reset Signals1.5.1.4. Connect the Reset Signals
You must connect all the reset signals, which eliminates the error messages in the Messages tab. Qsys allows multiple reset domains, or one reset signal for the system. In the design, you want to connect all the reset signals with the incoming reset signal. To connect all the reset signals, on the System menu, select Create Global Reset Network.
At this point in the system design, Qsys shows no remaining error messages. If you have any error messages in the Messages tab, review the procedures to create this system to ensure you did not miss a step. You can view the reset connections and the timing adapters on the System Contents tab, and by selecting Show System With Qsys Interconnect on the System menu.