1.1. Software and Hardware Requirements
1.2. Download and Install the Tutorial Design Files
1.3. Open the Tutorial Project
1.4. Creating Qsys Systems
1.5. Assemble a Hierarchical System
1.6. Viewing the Memory Tester System in Qsys
1.7. Compiling and Downloading Software to a Development Board
1.8. Debugging Your Design
1.9. Verifying Hardware in System Console
1.10. Simulating Custom Components
1.11. View a Diagram of the Completed System
1.4.1.1. Create a New Qsys System and Set up the Clock Source
1.4.1.2. Add a Pipeline Bridge
1.4.1.3. Add a Custom Pattern Generator
1.4.1.4. Add a PRBS Pattern Generator
1.4.1.5. Add a Two-to-One Streaming Multiplexer
1.4.1.6. Verify the Memory Address Map
1.4.1.7. Connect the Reset Signals
1.4.1.8. Save the System
1.4.2.1. Create a New Qsys System and Set Up the Clock Soource
1.4.2.2. Add a Pipeline Bridge
1.4.2.3. Add a Custom Pattern Checker
1.4.2.4. Add the PRBS Pattern Checker
1.4.2.5. Add a One-to-Two Streaming Demultiplexer
1.4.2.6. Verify the Memory Address Map
1.4.2.7. Connect the Reset Signals
1.4.2.8. Save the System
1.4.2.4. Add the PRBS Pattern Checker
The PRBS pattern checker performs the opposite operation of the PRBS pattern generator. The processor uses the memory-mapped csr slave interface to control the component. The st_pattern_input streaming input accepts data from the one-to-two streaming demultiplexer.
- In the IP Catalog, expand Memory Test Microcores, and then double-click PRBS Pattern Checker.
- In the parameter editor, accept the default parameters, and then click Finish.
- Rename the instance to prbs_pattern_checker.
- Set the prbs_pattern_checker clock to clk_0.
- Connect the prbs_pattern_checker csr interface to the mm_bridge m0 interface.
- Assign the prbs_pattern_checker csr interface to a base address of 0x0440.