Video and Vision Processing Suite Intel® FPGA IP User Guide

ID 683329
Date 2/15/2022

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Document Table of Contents

19.1.1. TMO IP Features

  • Intel FPGA video streaming data interfaces for video IOs
  • Avalon memory-mapped interface for CPU control interfaces
  • User defined volume controls to dial up or down contrast enhancement strength
  • RGB 8-bit, 10bit, or 12-bit per color component
  • 1, 2, or 4 parallel pixels per clock
  • 16 tiles (arranged in a 4x4 grid) for local image statistics collection
  • Video resolutions up to 8192x4320 at 60 fps or 8192x8192 at 30 fps
  • Latency of less than 150 pixels
  • FPGA footprint of approximately:
    • 7K ALMs
    • 56 DSP blocks
    • 60 M20Ks