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1. About the Video and Vision Processing Suite 2. Getting Started with the Video and Vision Processing IPs 3. Video and Vision Processing IPs Functional Description 4. Video and Vision Processing IP Interfaces 5. Video and Vision Processing IP Registers 6. Video and Vision Processing IPs Software Programming Model 7. Protocol Converter Intel® FPGA IP 8. 3D LUT Intel® FPGA IP 9. Chroma Resampler Intel® FPGA IP 10. Clipper Intel® FPGA IP 11. Clocked Video to Full Raster Converter Intel® FPGA IP 12. Color Space Converter Intel® FPGA IP 13. Full Raster to Clocked Video Converter Intel FPGA IP 14. Full Raster to Streaming Converter Intel® FPGA IP 15. Guard Bands Intel® FPGA IP 16. Mixer Intel FPGA IP 17. Pixels in Parallel Converter IP 18. Scaler 19. Tone Mapping Operator Intel® FPGA IP 20. Test Pattern Generator Intel FPGA IP 21. Video Frame Buffer Intel FPGA IP 22. Video Streaming FIFO Intel FPGA IP 23. Warp Intel® FPGA IP 24. Document Revision History for Video and Vision Processing Suite User Guide
7.1. About the Protocol Converter IP
The IP converts between three interface protocols: Avalon streaming video, Intel FPGA streaming video lite variant and Intel FPGA streaming video full variant. You can select any of the three protocols for the input and output interface. The IP allows you to create systems with IPs from both Intel video IP libraries. The Video and Vision Processing IPs use the AXI4-Stream based Intel FPGA Streaming Video protocol to receive and transmit streaming video data at their interfaces. The Video and Image Processing IPs use the Avalon Streaming Video protocol. The Video and Vision Processing IPs do not directly connect to IP from the Video and Image Processing library.
Figure 11. Protocol Converter Example
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