1.1. Features 1.2. Device Support 1.3. Resource Utilization and Performance 1.4. Installing and Licensing Intel® FPGA IP Cores 1.5. Customizing and Generating IP Cores 1.6. Functional Description 1.7. Using the Fault Injection Debugger and Fault Injection IP Core 1.8. Fault Injection IP Core User Guide Archives 1.9. Document Revision History for Fault Injection IP Core User Guide
1. Fault Injection Intel® FPGA IP Core User Guide
|Intel® Quartus® Prime Design Suite 18.1|
The Fault Injection Intel® FPGA IP core injects errors into the configuration RAM (CRAM) of an FPGA device.
This procedure simulates soft errors that can occur during normal operation due to single event upsets (SEUs). SEUs are rare events, and are therefore difficult to test. After you instantiate the Fault Injection IP core into your design and configure your device, you can use the Intel® Quartus® Prime Fault Injection Debugger tool to induce intentional errors in the FPGA to test the system's response to these errors.
- Device Support
- Resource Utilization and Performance
- Installing and Licensing Intel FPGA IP Cores
- Customizing and Generating IP Cores
- Functional Description
- Using the Fault Injection Debugger and Fault Injection IP Core
- Fault Injection IP Core User Guide Archives
- Document Revision History for Fault Injection IP Core User Guide
Did you find the information on this page useful?