3.7.2. Collection Commands
The Timing Analyzer supports collection commands that provide easy access to ports, pins, cells, or nodes in the design. Use collection commands with any constraints or Tcl commands specified in the Timing Analyzer.
|all_clocks||All clocks in the design|
|all_inputs||All input ports in the design.|
|all_outputs||All output ports in the design.|
|all_registers||All registers in the design.|
|get_cells||Cells in the design. All cell names in the collection match the specified pattern. Wildcards can be used to select multiple cells at the same time.|
|get_clocks||Lists clocks in the design. When used as an argument to another command, such as the -from or -to of set_multicycle_path, each node in the clock represents all nodes clocked by the clocks in the collection. The default uses the specific node (even if the node is a clock) as the target of a command. The -of_objects option takes a node like a register and returns the clocks that drive it.|
|get_nets||Nets in the design. All net names in the collection match the specified pattern. You can use wildcards to select multiple nets at the same time.|
|get_pins||Pins in the design. All pin names in the collection match the specified pattern. You can use wildcards to select multiple pins at the same time.|
|get_ports||All ports (design inputs and outputs) in the design.|
|get_registers||Gets the specified registers in the design.|
|get_keepers||Gets the specified keepers in the design. Keepers are I/O ports or registers.|
You can also examine collections and experiment with collections using wildcards in the Timing Analyzer by clicking Name Finder from the View menu.