AN 916: JESD204C Intel® FPGA IP and ADI AD9081/AD9082 MxFE* Interoperability Report for Intel® Stratix® 10 E-Tile Devices

ID 683157
Date 6/22/2020
Document Table of Contents

1.3.4. ADC Test Result Comment

In receiver test case, the JESD204C receiver IP core successfully locked at sync header alignment phase and EMB alignment phase, no data integrity issue is observed by the ramp checker.

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