18.104.22.168. Specify Instance-Specific Constraints in Assignment Editor 22.214.171.124. Specifying Multi-Dimensional Bus Constraints 126.96.36.199. Specify I/O Constraints in Pin Planner 188.8.131.52. Plan Interface Constraints in Interface Planner and Tile Interface Planner 184.108.40.206. Adjust Constraints with the Chip Planner 220.127.116.11. Constraining Designs with the Design Partition Planner
18.104.22.168. Step 6: Validate and Export Plan Constraints
You must validate your interface plan before exporting the plan constraints to your project as a generated Tcl script. Validation must confirm that the Fitter can place all remaining unplaced design elements before you can generate the script. When you are satisfied with your interface plan, follow these steps to validate and apply the interface plan to your Intel® Quartus® Prime project:
- In the Flow control, click Validate Plan. The Fitter confirms placement of all remaining unplaced design elements. You must correct any errors before you can export constraints.
- After validation, click Export Constraints to generate a Tcl script that applies the plan to your project. The output Tcl file contains instructions to apply the interface plan to your Intel® Quartus® Prime project.
- Close Interface Planner.
- To apply the exported interface plan constraints to your Intel® Quartus® Prime project, click Tools > Tcl Scripts and select the <project name>.pdp_assignments.tcl script file.
- Click Run. The script runs, applying the Interface Planner constraints to the project. Alternatively, you can run the script from the project directory:
quartus_sh –t <assignments_file>.tcl
- To run synthesis and apply the interface plan in your project, click Start > Start Analysis & Synthesis.
- Confirm the implementation of your plan by reviewing the Compilation Report.
Did you find the information on this page useful?