Intel® Quartus® Prime Pro Edition User Guide: Design Constraints

ID 683143
Date 4/27/2022
Public

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2.1.2.4.1. Plan Clock Networks

Interface Planner allows you to visualize and plan clock networks. For Intel® Arria® 10 and Intel® Cyclone® 10 GX devices, you can locate, highlight, place, and edit the type of clock elements in the Plan tab.
Note: The Intel® Stratix® 10 device family does not support the Clocking filter in Interface Planner. For Intel® Stratix® 10 designs, use the Autoplace Selected command to place all unplaced clock elements.

Interface Planner generates a Clocks report that details the signals using low-skew routing networks (clock networks) in the device.

To identify and place clocking elements in your design, click the Clocking filter in the Plan tab. You can refine the list further by entering search text in the Design Element Filter. Interface Planner represents clock networks as groupings of the following clock network elements:

  • Clock source
  • Clock mux
  • Clock region
Figure 15. Clocking Design Elements

You can place an entire clock group or individual clock elements by dragging into the location, or using the Report Legal Locations of Selected Element or the Autoplace Selected commands. After placement, hover the cursor over the item in the Design Element list to highlight the placement. The placement of clock elements impacts the placement of dependent core and periphery elements.

You can edit the clock type for clocking design elements. The clock type impacts the placement of dependent core and periphery elements. Right-click any clock element to specify one of the following clock types:

  • Not Set
  • Locally Routed
  • Global
  • Large Periphery
  • Periphery
  • Regional

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