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Visible to Intel only — GUID: lro1402071738890
Ixiasoft
Visible to Intel only — GUID: lro1402071738890
Ixiasoft
36.2.1.3. Counter Stop Registers
Field Name | Counter Stop Registers | |
---|---|---|
Bit Location | 31 | 0 |
If the ILC is configured to support the pulse IRQ signal, then the counter stop registers are utilized by running software to halt the counter. Each bit corresponds to the IRQ port. For example, bit 0 controls IRQ_0 counter. To stop the counter you have to write a binary ‘1’ into the register. Counter stop registers do not affect the operation of the ILC in level mode.