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Visible to Intel only — GUID: lxo1645583299724
Ixiasoft
Visible to Intel only — GUID: lxo1645583299724
Ixiasoft
26.3.2.2. Memory Type
- Type—
- RAM (writable)—This setting creates a readable and writable memory.
- ROM (read only)—This setting creates a read-only memory.*
- Number of AXI interfaces—
- Single Interface—This setting creates a memory component with a single AXI-4 agent. Each AXI-4 agent consists of independent read and write channels.
- Dual Interfaces**—This setting creates a memory component with two AXI-4 agents. Each AXI-4 agent consists of independent read and write channels.
Note:*AXI-4 ROM memory-type exposed both read and write channels. AXI-4 ROM write channel will be terminated internally and any write transaction will not take effect.
**Dual AXI interfaces for RAM memory type is only supported in Intel® Stratix® 10 and Intel Agilex® 7 devices.
- Block Type—This setting directs the Intel® Quartus® Prime software to use a specific type of memory block when fitting the On-Chip Memory II in the FPGA. There are three settings:
- Auto—Allows Intel® Quartus® Prime software to choose a type of memory block when fitting the On-Chip Memory in the FPGA. This setting is the best to use because of the constraints on some memory types.
- M20K—This setting is selected when fitting the On-Chip Memory II in the FPGA.
- MLAB—This setting is selected when fitting the On-Chip Memory II in the FPGA.
Note: MLAB does not support AXI-4 dual interface.