Avalon® Interface Specifications

ID 683091
Date 1/24/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

1. Introduction to the Avalon® Interface Specifications

Updated for:
Intel® Quartus® Prime Design Suite 20.1
Avalon® interfaces simplify system design by allowing you to easily connect components in Intel® FPGA. The Avalon® interface family defines interfaces appropriate for streaming high-speed data, reading and writing registers and memory, and controlling off-chip devices. Components available in Platform Designer incorporate these standard interfaces. Additionally, you can incorporate Avalon® interfaces in custom components, enhancing the interoperability of designs.

This specification defines all the Avalon® interfaces. After reading this specification, you should understand which interfaces are appropriate for your components and which signal roles to use for particular behaviors. This specification defines the following seven interfaces:

  • Avalon® Streaming Interface ( Avalon® -ST)—an interface that supports the unidirectional flow of data, including multiplexed streams, packets, and DSP data.
  • Avalon® Memory Mapped Interface ( Avalon® -MM)—an address-based read/write interface typical of Host-Agent connections.
  • Avalon® Conduit Interface— an interface type that accommodates individual signals or groups of signals that do not fit into any of the other Avalon® types. You can connect conduit interfaces inside a Platform Designer system. Alternatively, you can export them to connect to other modules in the design or to FPGA pins.
  • Avalon® Tri-State Conduit Interface ( Avalon® -TC) —an interface to support connections to off-chip peripherals. Multiple peripherals can share pins through signal multiplexing, reducing the pin count of the FPGA and the number of traces on the PCB.
  • Avalon® Interrupt Interface—an interface that allows components to signal events to other components.
  • Avalon® Clock Interface—an interface that drives or receives clocks.
  • Avalon® Reset Interface—an interface that provides reset connectivity.

A single component can include any number of these interfaces and can also include multiple instances of the same interface type.

Note: Avalon® interfaces are an open standard. No license or royalty is required to develop and sell products that use or are based on Avalon® interfaces.