1.1. Functional Description 1.2. Error Correction 1.3. Using the Error Detection CRC Feature 1.4. Error Injection 1.5. Modifying Single-Device .jam Files for Use in a Multi-Device JTAG Chain 1.6. Running .jam Files with the Intel® Quartus® Prime Jam Tools 1.7. Document Revision History for AN 539: Test Methodology of Error Detection and Recovery using CRC in Intel® FPGA Devices
1.1.3. Error Detection Pin
When you enable the error detection feature, use the CRC_ERROR pin as a dedicated output pin, otherwise use the CRC_ERROR pin as an user I/O pin. When you use this pin as a dedicated output pin, the active high signal on this pin indicates that the error detection circuit has detected errors in the configured CRAM bits. When you enable the WYSIWYG function, the CRC error output is a dedicated path to the CRC_ERROR pin. You can also use this pin as an open-drain output by enabling the options using the Intel® Quartus® Prime software. Using this pin as an open-drain output provides voltage leveling advantages.
Note: Only use the CRC_ERROR pin during user mode error detection.
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