Intel® Acceleration Stack User Guide: Intel FPGA Programmable Acceleration Card N3000

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ID 683040
Date 6/14/2021
Public
Document Table of Contents
Document Table of Contents x
1. About this Document 2. System Requirements 3. Hardware Installation 4. Installing the OPAE Software 5. OPAE Tools 6. Sample Test: Native Loopback 7. Installing the Intel XL710 Driver 8. Configuring Ethernet Interfaces 9. Testing Network Loopback Using Data Plane Development Kit (DPDK) 10. Graceful Shutdown 11. Single Event Upset (SEU) 12. Document Revision History for Intel Acceleration Stack User Guide: Intel® FPGA PAC N3000 A. Troubleshooting B. Upgrade your Intel® FPGA PAC N3000 with Production Version of BMC and Intel® Arria® 10 Image C. Configure the 4.19 Kernel D. fpgabist Sample Output
1. About this Document x
1.1. Acronym List
2. System Requirements x
2.1. Cooling Requirements
3. Hardware Installation x
3.1. Installing the Intel® FPGA PAC N3000
4. Installing the OPAE Software x
4.1. Install Additional Packages 4.2. Install the Release Package 4.3. Identify the Intel® MAX® 10 Version on your Intel® FPGA PAC N3000
4.2. Install the Release Package x
4.2.1. Remove Previous OPAE Packages 4.2.2. Install the Acceleration Stack for Runtime 4.2.3. Install the Acceleration Stack for Development 4.2.4. Verify the OPAE Installation 4.2.5. Install the Configuration Files
4.3. Identify the Intel® MAX® 10 Version on your Intel® FPGA PAC N3000 x
4.3.1. FPGA Factory Image Overview
5. OPAE Tools x
5.1. Using fpgasupdate 5.2. Using fpgainfo 5.3. Test PCIe and External Memories with fpgabist 5.4. Test Network Loopback using fpgadiag
7. Installing the Intel XL710 Driver x
7.1. Updating the Intel XL710 Firmware
8. Configuring Ethernet Interfaces x
8.1. Modifying the Interface Maximum Transmission Unit (MTU) Size 8.2. Setting Forward Error Correction (FEC) Mode 8.3. Ethernet Pause Flow Control 8.4. Get Link Status and Statistics
9. Testing Network Loopback Using Data Plane Development Kit (DPDK) x
9.1. Test Using an External Traffic Generator 9.2. Test Using a Packet Generator 9.3. Troubleshooting in DPDK 9.4. Revert Back from DPDK to OPAE
10. Graceful Shutdown x
10.1. Background 10.2. Using OPAE 10.3. Using DPDK
11. Single Event Upset (SEU) x
11.1. OPAE Handling of SEU 11.2. DPDK Handling of SEU
A. Troubleshooting x
A.1. If OPAE installation verification fails, how to install OPAE manually?
B. Upgrade your Intel® FPGA PAC N3000 with Production Version of BMC and Intel® Arria® 10 Image x
B.1. Upgrading from 1.1 Beta to Production Version B.2. Upgrading from 1.1 Alpha-2 or Older to Production Version
B.1. Upgrading from 1.1 Beta to Production Version x
B.1.1. Root Entry Hash Programmed B.1.2. Root Entry Hash Not Programmed
D. fpgabist Sample Output x
D.1. For 2x2x25G Configuration D.2. For 8x10G Configuration
1. About this Document
2. System Requirements
3. Hardware Installation
4. Installing the OPAE Software
5. OPAE Tools
6. Sample Test: Native Loopback
7. Installing the Intel XL710 Driver
8. Configuring Ethernet Interfaces
9. Testing Network Loopback Using Data Plane Development Kit (DPDK)
10. Graceful Shutdown
11. Single Event Upset (SEU)
12. Document Revision History for Intel Acceleration Stack User Guide: Intel® FPGA PAC N3000
A. Troubleshooting
B. Upgrade your Intel® FPGA PAC N3000 with Production Version of BMC and Intel® Arria® 10 Image
C. Configure the 4.19 Kernel
D. fpgabist Sample Output

8. Configuring Ethernet Interfaces

The Intel® FPGA PAC N3000 contains multiple Ethernet MAC points where each point has specific naming, monitoring and configuration operations. The following figures illustrate the Ethernet data path for each network configuration.
Figure 13. 8x10G Configuration
Figure 14. 2x2x25G Configuration
Figure 15. 4x25G Configuration
The above figures show example device naming conventions for the XL710 enp[Y:Z]s0f[3:0]. Your server may have a different naming convention and numbering scheme. You will need the network logical names to use Linux tools for link configuration and monitoring. To find the network logical names of a specific Intel® FPGA PAC N3000 in your server, perform the following steps:
  1. List the available Intel® FPGA PAC N3000 in your server using:
    $ sudo fpgainfo fme
    Sample output: 
    Board Management Controller, 
               Intel® 
               MAX® 10 NIOS FW version D.2.0.19
Board Management Controller, 
               Intel® 
               MAX® 10 Build version D.2.0.6
//****** FME ******//
Object Id                     : 0xEF00000
PCIe s:b:d.f                  : 0000:15:00.0
Device Id                     : 0x0b30
Numa Node                     : 0
Ports Num                     : 01
Bitstream Id                  : 0x23000410010309
Bitstream Version             : 0.2.3
Pr Interface Id               : a5d72a3c-c8b0-4939-912c-f715e5dc10ca
Boot Page                     : user
  2. Use the following command to find the logical name(s) of the Ethernet interfaces on that Intel® FPGA PAC N3000:
    ls -la /sys/class/net
    Sample output: 
    lrwxrwxrwx. 1 root root 0 Nov 20 06:07 enp20s0f0 -> ../../devices/pci0000:11/0000:11:00.0/0000:12:00.0/0000:13:08.0/0000:14:00.0/net/enp20s0f0
lrwxrwxrwx. 1 root root 0 Nov 20 06:07 enp20s0f1 -> ../../devices/pci0000:11/0000:11:00.0/0000:12:00.0/0000:13:08.0/0000:14:00.1/net/enp20s0f1
lrwxrwxrwx. 1 root root 0 Nov 20 06:07 enp22s0f0 -> ../../devices/pci0000:11/0000:11:00.0/0000:12:00.0/0000:13:10.0/0000:16:00.0/net/enp22s0f0
lrwxrwxrwx. 1 root root 0 Nov 20 06:07 enp22s0f1 -> ../../devices/pci0000:11/0000:11:00.0/0000:12:00.0/0000:13:10.0/0000:16:00.1/net/enp22s0f1
lrwxrwxrwx. 1 root root 0 Nov 20 02:34 lo -> ../../devices/virtual/net/lo
lrwxrwxrwx. 1 root root 0 Nov 20 22:44 npacf0g0l0 -> ../../devices/pci0000:11/0000:11:00.0/0000:12:00.0/0000:13:09.0/0000:15:00.0/fpga/intel-fpga-dev.0/intel-fpga-fme.0/pac_n3000_net.2.auto/net/npacf0g0l0
lrwxrwxrwx. 1 root root 0 Nov 20 22:44 npacf0g0l1 -> ../../devices/pci0000:11/0000:11:00.0/0000:12:00.0/0000:13:09.0/0000:15:00.0/fpga/intel-fpga-dev.0/intel-fpga-fme.0/pac_n3000_net.2.auto/net/npacf0g0l1
lrwxrwxrwx. 1 root root 0 Nov 20 22:44 npacf0g0l2 -> ../../devices/pci0000:11/0000:11:00.0/0000:12:00.0/0000:13:09.0/0000:15:00.0/fpga/intel-fpga-dev.0/intel-fpga-fme.0/pac_n3000_net.2.auto/net/npacf0g0l2
lrwxrwxrwx. 1 root root 0 Nov 20 22:44 npacf0g0l3 -> ../../devices/pci0000:11/0000:11:00.0/0000:12:00.0/0000:13:09.0/0000:15:00.0/fpga/intel-fpga-dev.0/intel-fpga-fme.0/pac_n3000_net.2.auto/net/npacf0g0l3

For example:

This listing is example of the 8x10G network configuration. The logical device names npacf0g0l[3:0] represents the Ethernet MAC wrapper 0 on the line side Intel® Arria® 10 FPGA. The logical device names enp[Y:Z]s0f[1:0] are the XL710 Ethernet ports.

The pac_n3000_net platform device driver creates the standard Linux network device interfaces for each Intel® Arria® 10 FPGA Ethernet MAC pair. It provides C827 re-timer information for unified network status reporting. It enables use of standard Linux tools for both link configuration and monitoring. 
$ lsmod | grep pac_n3000_net
pac_n3000_net          28483  1 c827_retimer

Section Content
Modifying the Interface Maximum Transmission Unit (MTU) Size
Setting Forward Error Correction (FEC) Mode
Ethernet Pause Flow Control
Get Link Status and Statistics

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