|Sensor ID||Sensor||Upper Fatal Threshold||Upper Warning Threshold||Lower Fatal Threshold||Lower Warning Threshold|
|12||FPGA Core Temperature||100°C||90°C||X||X|
|25||12V Aux Voltage||X||X||10.56 V||11.40 V|
|3||12 V Backplane Voltage||X||X||10.56 V||11.40 V|
For more information about sensors, refer to the Intel FPGA Programmable Acceleration Card N3000 Board Management Controller User Guide.
Surpassing the fatal thresholds of the above four critical sensors causes the Intel FPGA PAC PCIe buses to shut off, which could lead to a server Fatal PCIe Surprise Link Down event.
Intel provides two methods to prevent the server Fatal PCIe Surprise Link Down event. These methods mask PCIe Advanced Error Reporting (AER) registers for the Intel® FPGA PAC N3000 to avoid Surprise Link Down. If you are using DPDK and have unbound the OPAE FPGA driver, follow the method described under Using DPDK.
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