Intel Agilex® 7 Variable Precision DSP Blocks User Guide

ID 683037
Date 10/02/2023
Document Table of Contents Dynamic Chainout

Intel Agilex® 7 devices support CHAINOUT port which can be dynamically disabled or enabled. In this feature, the input register is always enabled for the DISABLE_CHAINOUT signal.
Figure 9. Dynamic Chainout
Table 8.  DISABLE_CHAINOUT Signal Behavior
DISABLE_CHAINOUT Signal Description
Low (0) Chainout = result from output register
High (1) Chainout = 0. Chainin to the next variable precision DSP block is disabled.