AN 746: SDI II Triple-Rate Reference Designs for Intel® Arria® 10 Devices

ID 683012
Date 12/31/2019
Public
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1.1.2.4. Parallel Loopback

Follow these steps to run the test:

  1. Connect an SDI signal generator to the receiver input, SDI_RX_P (J20), of channel 0.
  2. Connect an SDI signal analyzer to the transmitter output, SDI_TX_P (J21), of channel 0.
  3. Check the result on the SDI signal analyzer.
This test uses the following user LEDs to indicate the respective conditions:
  • D7 and D8 indicate the receiver signal standard.
  • D6 illuminates when the trs_locked signal for channel 0 is asserted.
  • D5 illuminates when the frame_locked signal for channel 0 is asserted.
Figure 7. User LEDs