GTS Ethernet Hard IP User Guide: Agilex™ 3 FPGAs and SoCs

ID 848477
Date 7/07/2025
Public
Document Table of Contents

4.1.1. Implement MAC Synchronous Clock Connections

You must perform the following clock connections for MAC Synchronous operation:

Figure 16. Clock Connections for MAC Synchronous Operation
  • Connect PMA reference clock to i_clk_ref_p of GTS Ethernet Hard IP .
  • Connect o_syspll_c0 clock output of GTS System PLL Clocks IP IP to i_clk_sys of GTS Ethernet Hard IP .
  • Connect i_refclk of GTS System PLL Clocks IP to any of the local or regional reference clock source.
  • The i_clk_ref_p of GTS Ethernet Hard IP and i_refclk of GTS System PLL Clocks IP can share the same clock source.
  • Provide the required clock source to i_reconfig_clk clock.