GTS JESD204B Intel® FPGA IP Design Example User Guide

ID 844839
Date 6/06/2025
Public

2. GTS JESD204B Intel® FPGA IP Design Example Quick Start Guide

The GTS JESD204B Intel® FPGA IP design examples for Agilex™ 5 devices features a simulation testbench and a hardware design that supports compilation and hardware testing while Agilex™ 3 devices feature a simulation testbench.

You can generate the GTS JESD204B design examples through the IP catalog in the Quartus® Prime Pro Edition software.

Figure 1. Development Stages for the Design Example