GTS JESD204B Intel® FPGA IP Design Example User Guide

ID 844839
Date 6/06/2025
Public

3. Detailed Description for the GTS JESD204B Design Example

The GTS JESD204B design example demonstrates the functionality of data streaming using loopback mode.

You can specify the parameters settings of your choice and generate the design example.

The design example is available only in duplex mode for both Base and PHY variant.