AN 999: Drive-on-Chip with Functional Safety Design Example: Agilex™ 7 Devices
ID
823627
Date
7/04/2024
Public
Visible to Intel only — GUID: ghi1716371808107
Ixiasoft
1. About the Drive-on-Chip with Functional Safety Design Example for Agilex™ 7 Devices
2. Getting Started
3. Rebuilding the Drive-on-Chip Design
4. Functional Description of the Drive-On-Chip with Functional Safety Design Example for Agilex 7 Devices
5. HPS Channel Safety Software
6. Drive-on-Chip Design Recommendations and Disclaimers
7. Document Revision History for AN 999: Drive-on-Chip with Functional Safety Design Example for Agilex 7 Devices
2.1. Software Requirements for the Drive-On-Chip with Functional Safety Design Example for Agilex 7 Devices
2.2. Hardware Requirements for the Safe Drive-On-Chip with Functional Safety Design Example for Agilex 7 Devices
2.3. Downloading and Installing the Design
2.4. Installing Python
2.5. Creating an SD Card Image
2.6. Setting Up your Development Board for the Drive-On-Chip with Functional Safety Design Example for Agilex 7 Devices
2.7. Debugging and Monitoring the Drive-On-Chip with Functional Safety Design Example for Agilex 7 Devices with Python GUI
2.8. Looking into the Drive-On-Chip Output
3.1. Generating the Platform Designer System
3.2. Generating and Building the NiosV/g BSP for the Drive-On-Chip Design Example
3.3. Compiling the Hardware in the Intel Quartus Prime Software
3.4. Modifying the Motor Control Software Application
3.5. Generating .jic and .rbf files After Hardware Modifications
3.6. Recreate an SD Card Image
3.7. Modifying the HPS Safety Function Application
Visible to Intel only — GUID: ghi1716371808107
Ixiasoft
5.2. HPS Channel Speed Monitoring Safety Application
The Drive-On-Chip with Functional Safety design implements an HPS channel safety function with an application running in the Agilex 7 HPS. The application is by default cross compiled for ARM64 architecture and the executable is added to /opt/hpssafechannel directory during the Yocto build. The application is set to run as a service after the HPS finish booting Linux. If necessary, you can compile and modify the application without building Yocto.
The main functions of the HPS channel speed monitoring safety application are:
- Detect and connect with the devices in the FPGA soft logic necessary to implement the Safety Function
- Estimate speed at 25 kHz rate, accessing the drive-on-chip quadrature encoder pulse encoder raw position values.
- Generate the HPS payload according to specification.
- Detect overspeed in the Axis0 of the drive-on-chip hardware.
- Cross compare the HPS payload with the FPGA payload.
- Generate HPS channel safety outputs to the external safety logic block.
- Write values for GUI display in the GUI safety memory.
- Print the status of the application in the UART terminal.