AN 999: Drive-on-Chip with Functional Safety Design Example: Agilex™ 7 Devices

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ID 823627
Date 7/04/2024
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Document Table of Contents
Document Table of Contents x
1. About the Drive-on-Chip with Functional Safety Design Example for Agilex™ 7 Devices 2. Getting Started 3. Rebuilding the Drive-on-Chip Design 4. Functional Description of the Drive-On-Chip with Functional Safety Design Example for Agilex 7 Devices 5. HPS Channel Safety Software 6. Drive-on-Chip Design Recommendations and Disclaimers 7. Document Revision History for AN 999: Drive-on-Chip with Functional Safety Design Example for Agilex 7 Devices
1. About the Drive-on-Chip with Functional Safety Design Example for Agilex™ 7 Devices x
1.1. Features of the Drive-on-Chip with Functional Safety Design Example for Agilex 7 Devices 1.2. About the Safety Concept 1.3. Other Drive-on-Chip Design Documents
1.2. About the Safety Concept x
1.2.1. High-Level Block Diagram of the Drive-On-Chip with Functional Safety Design Example
2. Getting Started x
2.1. Software Requirements for the Drive-On-Chip with Functional Safety Design Example for Agilex 7 Devices 2.2. Hardware Requirements for the Safe Drive-On-Chip with Functional Safety Design Example for Agilex 7 Devices 2.3. Downloading and Installing the Design 2.4. Installing Python 2.5. Creating an SD Card Image 2.6. Setting Up your Development Board for the Drive-On-Chip with Functional Safety Design Example for Agilex 7 Devices 2.7. Debugging and Monitoring the Drive-On-Chip with Functional Safety Design Example for Agilex 7 Devices with Python GUI 2.8. Looking into the Drive-On-Chip Output
2.3. Downloading and Installing the Design x
2.3.1. Design Directory Structure
2.7. Debugging and Monitoring the Drive-On-Chip with Functional Safety Design Example for Agilex 7 Devices with Python GUI x
2.7.1. GUI Safety Function Tab for the Drive-On-Chip with Functional Safety Design Example for Agilex 7 Devices
3. Rebuilding the Drive-on-Chip Design x
3.1. Generating the Platform Designer System 3.2. Generating and Building the NiosV/g BSP for the Drive-On-Chip Design Example 3.3. Compiling the Hardware in the Intel Quartus Prime Software 3.4. Modifying the Motor Control Software Application 3.5. Generating .jic and .rbf files After Hardware Modifications 3.6. Recreate an SD Card Image 3.7. Modifying the HPS Safety Function Application
4. Functional Description of the Drive-On-Chip with Functional Safety Design Example for Agilex 7 Devices x
4.1. Drive-on-Chip Related Subsystems 4.2. HPS Safety Subsystem 4.3. Safety Subsystem 4.4. Shared Memory Subsystem 4.5. External Safety Logic 4.6. Hardware Subsystem 4.7. Voltage Thresholds 4.8. IP Input and Output Signals 4.9. Registers
4.3. Safety Subsystem x
4.3.1. Safety Block 4.3.2. Quadrature Encoder Pulse 4.3.3. Interval Timer
4.3.1. Safety Block x
4.3.1.1. Safety Function Block 4.3.1.2. Cross-Comparison Block
5. HPS Channel Safety Software x
5.1. Meta Layer and Yocto Build 5.2. HPS Channel Speed Monitoring Safety Application
5.1. Meta Layer and Yocto Build x
5.1.1. Layer Configuration Files 5.1.2. Board Support Package Recipes (recipes-bsp)
5.2. HPS Channel Speed Monitoring Safety Application x
5.2.1. Main (hps_safe_channel.c) 5.2.2. Speed Estimation Thread (speed_estmation.c/.h) 5.2.3. Printing Thread (print_safety.c/.h) 5.2.4. Safety Function Application (srt.c/.h) 5.2.5. Access to Devices 5.2.6. Core Isolation and Core Affinity
1. About the Drive-on-Chip with Functional Safety Design Example for Agilex™ 7 Devices
2. Getting Started
3. Rebuilding the Drive-on-Chip Design
4. Functional Description of the Drive-On-Chip with Functional Safety Design Example for Agilex 7 Devices
5. HPS Channel Safety Software
6. Drive-on-Chip Design Recommendations and Disclaimers
7. Document Revision History for AN 999: Drive-on-Chip with Functional Safety Design Example for Agilex 7 Devices

4.6. Hardware Subsystem

The hardware subsystem collects information about the system, which the external safety logic can use. Agilex 7 devices contain on-chip voltage and temperature sensors.

The secure device manager stores sampled data, which you can access by using the Mailbox Client with Avalon Streaming Interface Intel FPGA IP. Using the relevant information, external safety logic can determine unsafe temperatures and inoperable voltage conditions.

The subsystem comprises command, response, a set of command addresses, and a mailbox client. During the command stage, the mailbox receives preprogrammed addresses. The response stage receives results from the mailbox and sorts into corresponding arrays.

Table 5.  Hardware Subsystem Command and Address InformationThe following table details the hardware dubsystem's I/O and a description of the signal. All I/O signals are asynchronous to the input clock, to avoid metastability these are synchronized.
Command Packets Command Type Command Description

1000000h

None 1 Has no function. Use as an intermediate address in the wait response state.

2001019h

0000001h

Temperature 2 Returns the value of the C with the highest temperature in the core fabric, sensor 0.

3001019h

0010001h

Temperature

 3 Returns the value of the temperature sensor with the highest temperature in the core fabric, sensor 1.

4001019h

0020001h

Temperature

 4 Returns the value of the temperature sensor with the highest temperature in the core fabric, sensor 2.

5001019h

0030001h

Temperature

 5 Returns the value of the temperature sensor with the highest temperature in the core fabric, sensor 3.

6001019h

0040001h

Temperature

 6 Returns the value of the temperature sensor with the highest temperature in the core fabric, sensor 4.

7001018h

0000001h

Voltage 7 Returns the measured voltage from channel 0, external analog differential input. Unused in design.

8001018h

0000002h

Voltage 8 Returns the measured voltage from channel 1, external analog differential input. unused in design.

9001018h

0000004h

Voltage 9 Returns the measured voltage from channel 2, Vcc. internal power supplies.

A001018h

0000008h

Voltage 10 Returns the measured voltage from channel 3, VCCIO_SDM. internal power supplies.

B001018h

0000010h

Voltage 11 Returns the measured voltage from channel 4, VCCPT. Internal power supplies.

C001018h

0000020h

Voltage 12 Returns the measured voltage from channel 5, VCCRCORE. Internal power supplies.

D001018h

0000040h

Voltage 13 Returns the measured voltage from channel 6, VCCH_SDM. Internal power supplies.

E001018h

0000080h

Voltage 14 Returns the measured voltage from channel 7, VCCL_SDM. Internal power supplies.

F001018h

0000100h

Voltage 15 Returns the measured voltage from channel 9, VCCADC. Internal power supplies.
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