GTS Ethernet Hard IP User Guide: Agilex™ 5 FPGAs and SoCs

ID 817676
Date 8/04/2025
Public
Document Table of Contents

4.4.2.4. Monitor Status and Errors on the RX MAC Avalon Streaming Client Interface

Sample o_rx_status_data and o_rx_error buses when o_rx_endofpacket, o_rx_valid, and o_rx_status_valid are asserted high. Refer to the following diagram for an example.

Figure 37. RX MAC Status and Errors

See the detailed description of o_rx_status_data and o_rx_error in the Connect the TX MAC Flow Control Interface.