GTS CPRI PHY Intel® FPGA IP User Guide

ID 814577
Date 3/31/2024
Public

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5.11. Datapath and PMA Avalon Memory-Mapped Interface

Table 25.  Datapath and PMA Avalon Memory-Mapped Interface Signals
Port Name Width (Bits) Domain Description
i_reconfig_addr 18 i_reconfig_clk Address for hard CSRs. Word addressing is used.
i_reconfig_read 1 i_reconfig_clk Read command for hard CSRs.
i_reconfig_write 1 i_reconfig_clk Write command for hard CSRs.
o_reconfig_readdata 32 i_reconfig_clk Read data from hard CSRs.
o_reconfig_readdatavalid 1 i_reconfig_clk Read data from hard CSRs is valid.
i_reconfig_writedata 32 i_reconfig_clk Data for writes to hard CSRs.
o_reconfig_waitrequest 1 i_reconfig_clk Stalling signal for operations on hard CSRs.
i_reconfig_byteenable 4 i_reconfig_clk Byteenable for hard CSRs