General-Purpose I/O User Guide: Agilex™ 5 FPGAs and SoCs

ID 813934
Date 4/05/2024
Public
Document Table of Contents

2.4.2.2. True Differential Signaling I/O Standard External Termination

Analyze the electrical specification requirement of the LVDS interface and ensure the common-mode voltage for your LVDS data rate conforms to the data sheet specification.
  • Use AC coupling and external voltage bias circuitry if the common-mode voltage of the output buffer does not match the differential receiver input common-mode voltage.
  • Consider using a dedicated VICM voltage supply for wide LVDS interfaces that share a common VICM reference voltage.
Note: Intel recommends that you use SPICE or IBIS models to verify your AC- or DC-coupled termination.
Figure 20. Example of AC-Coupled External VICM Termination


Figure 21. Example of AC-Coupled External Termination for 1.3 V VCCIO_PIO