General-Purpose I/O User Guide: Agilex™ 5 FPGAs and SoCs

ID 813934
Date 4/05/2024
Public
Document Table of Contents

4.3.3. Assigning Pin I/O Standards in the Quartus® Prime Pin Planner

You can use the Quartus® Prime Pin Planner for I/O pin planning, assignment, and validation.
Figure 32.  Quartus® Prime Pin Planner This figure shows an example of the user interface and does not represent actual components, features, or settings supported by Agilex™ 5 FPGAs.
  1. From the Quartus® Prime menu, select Assignments > Pin Planner.
  2. Under the Node Name column in the All Pins box, look for the pin that you want to configure.
  3. Under the I/O Standard column, select the supported I/O standards that you want to assign to the pin.
    If you select True Differential Signaling , the Pin Planner automatically adds a negative node with a specific pin location.