Parameterizable Macros for Intel FPGAs User Guide

ID 772350
Date 4/17/2023

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3. Inserting HDL Code from Parameterizable Macros Template

  1. Click File > New.
  2. In the New window, select the HDL language for the design files VHDL File or Verilog HDL File — and click OK.
    A text editor tab with a blank file opens.
  3. Right-click the blank file and click Insert Template.
  4. In the Insert Template window, expand the section corresponding to the appropriate HDL, then expand the Intel Parameterizable Macros section.
  5. Select a template.
    The template now appears in the Preview pane.
  6. To paste the HDL design into the blank Verilog or VHDL file you created, click Insert.
  7. Click Close to close the Insert Template dialog box.
Figure 1. Inserting a Parameterizable Macros Template