Parameterizable Macros for Intel FPGAs User Guide

ID 772350
Date 4/17/2023

A newer version of this document is available. Customers should click here to go to the newest version.

5.1. Asynchronous FIFO (async_fifo/ASYNC_FIFO)

For asynchronous FIFO or dual-clock FIFO (async_fifo/ASYNC_FIFO), the read and write are synchronized to the rdclk and wrclk clocks respectively.

Figure 4. Asynchronous FIFO Block Diagram