Intel Agilex® 7 General-Purpose I/O User Guide: M-Series

ID 772138
Date 9/11/2023

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2.6.3. HSPICE* Models

You can use the M-Series SPICE model to perform system-level simulations for various configurations. The SPICE kits provide models that support a wide variety of I/O features across process, voltage, and temperature (PVT)

Each SPICE kit contains the following items:

  • Encrypted transistor and logic cell library models
  • Encrypted input or output buffer circuit models for single-ended and differential I/Os
  • Single-ended and differential sample SPICE decks
  • User guide that describes the model usage

The HSPICE* models provide options to simulate buffer behavior for the following I/O features:

  • Slew rate
  • Weak pull-up
  • RS OCT with and without calibration
  • RT OCT with and without calibration
  • RD OCT with and without calibration
  • Receiver equalization calibration
  • De-emphasis
  • Pre-emphasis
  • Differential output voltage