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1. Intel® FPGA AI Suite Getting Started Guide
2. About the Intel® FPGA AI Suite
3. Installing the Intel® FPGA AI Suite
4. Installing the Intel® FPGA AI Suite PCIe-Based Design Example Prerequisites
5. Installing the Intel FPGA AI Suite Compiler and IP Generation Tools
6. Intel® FPGA AI Suite Quick Start Tutorial
A. Installation Notes for Other Operating Systems
B. Intel® FPGA AI Suite Getting Started Guide Archives
C. Intel® FPGA AI Suite Getting Started Guide Document Revision History
6.1. Creating a Working Directory
6.2. Preparing OpenVINO™ Model Zoo and Model Optimizer
6.3. Preparing a Model
6.4. Running the Graph Compiler
6.5. Preparing an Image Set
6.6. Programming the FPGA Device
6.7. Performing Inference on the PCIe-Based Example Design
6.8. Building an FPGA Bitstream for the PCIe Example Design
6.9. Building the Example FPGA Bitstreams
6.10. Preparing a ResNet50 v1 Model
6.11. Performing Inference on the Inflated 3D (I3D) Graph
6.12. Performing Inference on YOLOv3 and Calculating Accuracy Metrics
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1. Intel® FPGA AI Suite Getting Started Guide
| Updated for: |
|---|
| Intel® FPGA AI Suite 2023.1 |
The Intel® FPGA AI Suite Getting Started Guide provides the following information:
- An overview of the Intel FPGA AI Suite
- Installation instructions and list of prerequisites
- A tutorial that walks you through the process of running inference on a Resnet50 graph, including performance and area estimation
About the Intel® FPGA AI Suite Documentation Library
Documentation for the Intel® FPGA AI Suite is split across a few publications. Use the following table to find the publication that contains the Intel® FPGA AI Suite information that you are looking for:
| Title and Description | |
|---|---|
| Release Notes Provides late-breaking information about the Intel® FPGA AI Suite including new features, important bug fixes, and known issues. |
Link |
| Getting Started Guide Get up and running with the Intel® FPGA AI Suite by learning how to initialize your compiler environment and reviewing the various design examples and tutorials provided with the Intel® FPGA AI Suite |
Link |
| IP Reference Manual Provides an overview of the Intel® FPGA AI Suite IP and the parameters you can set to customize it. This document also covers the Intel® FPGA AI Suite IP generation utility. |
Link |
| Compiler Reference Manual Describes the use modes of the graph compiler (dla_compiler). It also provides details about the compiler command options and the format of compilation inputs and outputs. |
Link |
| PCIe-based Design Example User Guide Describes the design and implementation for accelerating AI inference using the Intel® FPGA AI Suite, Intel® Distribution of OpenVINO™ Toolkit, and an Intel® PAC with Intel® Arria® 10 GX FPGA or a Terasic* DE10-Agilex Development Board. |
Link |
| SoC-based Design Example User Guide Describes the design and implementation for accelerating AI inference using the Intel® FPGA AI Suite, Intel® Distribution of OpenVINO™ Toolkit, and an Intel® Arria® 10 SX SoC FPGA Development Kit. |
Link |
Intel® Distribution of OpenVINO™ Toolkit Requirement
To use the Intel® FPGA AI Suite, you must be familiar with the Intel® Distribution of OpenVINO™ Toolkit.
Intel® FPGA AI Suite Version 2023.1 requires the Intel® Distribution of OpenVINO™ Toolkit Version 2021.4.2 LTS. For OpenVINO™ documentation, refer to the following URL: