1. FPGA AI Suite Version 2024.1 Release Notes
| Updated for: |
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| Intel® FPGA AI Suite 2024.1 |
The FPGA AI Suite Version 2024.1 Release Notes provide late-breaking information about the FPGA AI Suite including new features, important bug fixes, and known issues.
About the FPGA AI Suite Documentation Library
Documentation for the FPGA AI Suite is split across a few publications. Use the following table to find the publication that contains the FPGA AI Suite information that you are looking for:
| Title and Description | |
|---|---|
| Release Notes Provides late-breaking information about the FPGA AI Suite including new features, important bug fixes, and known issues. |
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| Getting Started Guide Get up and running with the FPGA AI Suite by learning how to initialize your compiler environment and reviewing the various design examples and tutorials provided with the FPGA AI Suite |
Link |
| IP Reference Manual Provides an overview of the FPGA AI Suite IP and the parameters you can set to customize it. This document also covers the FPGA AI Suite IP generation utility. |
Link |
| Compiler Reference Manual Describes the use modes of the graph compiler (dla_compiler). It also provides details about the compiler command options and the format of compilation inputs and outputs. |
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| PCIe-based Design Example User Guide Describes the design and implementation for accelerating AI inference using the FPGA AI Suite, Intel® Distribution of OpenVINO™ toolkit, and an Intel® PAC with Arria® 10 GX FPGA or a Terasic* DE10-Agilex Development Board. |
Link |
| SoC-based Design Example User Guide Describes the design and implementation for accelerating AI inference using the FPGA AI Suite, Intel® Distribution of OpenVINO™ toolkit, and an Arria® 10 SX SoC FPGA Development Kit or Agilex™ 7 FPGA I-Series Transceiver-SoC Development Kit. |
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