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1. Intel® FPGA AI Suite Getting Started Guide
2. About the Intel® FPGA AI Suite
3. Installing the Intel® FPGA AI Suite
4. Installing the Intel® FPGA AI Suite PCIe-Based Design Example Prerequisites
5. Installing the Intel FPGA AI Suite Compiler and IP Generation Tools
6. Intel® FPGA AI Suite Quick Start Tutorial
A. Installation Notes for Other Operating Systems
B. Intel® FPGA AI Suite Getting Started Guide Archives
C. Intel® FPGA AI Suite Getting Started Guide Document Revision History
6.1. Creating a Working Directory
6.2. Preparing OpenVINO™ Model Zoo and Model Optimizer
6.3. Preparing a Model
6.4. Running the Graph Compiler
6.5. Preparing an Image Set
6.6. Programming the FPGA Device
6.7. Performing Inference on the PCIe-Based Example Design
6.8. Building an FPGA Bitstream for the PCIe Example Design
6.9. Building the Example FPGA Bitstreams
6.10. Preparing a ResNet50 v1 Model
6.11. Performing Inference on the Inflated 3D (I3D) Graph
6.12. Performing Inference on YOLOv3 and Calculating Accuracy Metrics
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6.12.1. Preparing a YOLOv3 Model
As stated in Preparing a Model, a model must be converted from a framework (such as TensorFlow, Caffe, or Pytorch) into a pair of .bin and .xml files before the Intel® FPGA AI Suite compiler (dla_compiler command) can ingest the model.
The following commands download the YOLOv3 TensorFlow model and run Model Optimizer:
cd $COREDLA_WORK/demo/open_model_zoo . venv/bin/activate tools/downloader/downloader.py --name yolo-v3-tf \ --output_dir $COREDLA_WORK/demo/models/ tools/downloader/converter.py --name yolo-v3-tf \ --download_dir $COREDLA_WORK/demo/models/ \ --output_dir $COREDLA_WORK/demo/models/
These commands create .bin and .xml files in the demo/models/public/yolo-v3-tf/FP32/ directory.