FPGA AI Suite: Compiler Reference Manual

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ID 768972
Date 3/29/2024
Public
Document Table of Contents
Document Table of Contents x
1. FPGA AI Suite Compiler Reference Manual 2. About the FPGA AI Suite Compiler 3. FPGA AI Suite Compiler Use Modes 4. FPGA AI Suite Compiler Command Line Options A. FPGA AI Suite Compiler Reference Manual Archives B. FPGA AI Suite Compiler Reference Manual Document Revision History
3. FPGA AI Suite Compiler Use Modes x
3.1. Compiling a Graph 3.2. Estimating the Performance of a Graph 3.3. Estimating the Performance of a Partition of a Graph 3.4. Estimating the Area of an Architecture 3.5. Generating an Optimized Architecture
3.5. Generating an Optimized Architecture x
3.5.1. Generating an Architecture for Highest Performance 3.5.2. Generating an Architecture Optimized for a Frame Rate Target Value
4. FPGA AI Suite Compiler Command Line Options x
4.1. Inputs (dla_compiler Command Options) 4.2. Outputs (dla_compiler Command Options) 4.3. Reporting (dla_compiler Command Options) 4.4. Compilation Options (dla_compiler Command Options) 4.5. Architecture Options (dla_compiler Command Options) 4.6. Architecture Optimizer Options (dla_compiler Command Options) 4.7. Analyzer Tool Options (dla_compiler Command Options) 4.8. Miscellaneous Options (dla_compiler Command Options) 4.9. Input File Formats for dla_compiler Command 4.10. Generation of Output File Formats 4.11. The Partitioning Table Report
1. FPGA AI Suite Compiler Reference Manual
2. About the FPGA AI Suite Compiler
3. FPGA AI Suite Compiler Use Modes
4. FPGA AI Suite Compiler Command Line Options
A. FPGA AI Suite Compiler Reference Manual Archives
B. FPGA AI Suite Compiler Reference Manual Document Revision History

1. FPGA AI Suite Compiler Reference Manual

Updated for:
Intel® FPGA AI Suite 2024.1

The FPGA AI Suite Compiler Reference Manual describes the use modes of the compiler. It also provides details about the compiler command options and the format of compile inputs and outputs.

About the FPGA AI Suite Documentation Library

Documentation for the FPGA AI Suite is split across a few publications. Use the following table to find the publication that contains the FPGA AI Suite information that you are looking for:
Table 1.   FPGA AI Suite Documentation Library
Title and Description  
Release Notes

Provides late-breaking information about the FPGA AI Suite including new features, important bug fixes, and known issues.

Link
Getting Started Guide

Get up and running with the FPGA AI Suite by learning how to initialize your compiler environment and reviewing the various design examples and tutorials provided with the FPGA AI Suite

Link
IP Reference Manual

Provides an overview of the FPGA AI Suite IP and the parameters you can set to customize it. This document also covers the FPGA AI Suite IP generation utility.

Link
Compiler Reference Manual

Describes the use modes of the graph compiler (dla_compiler). It also provides details about the compiler command options and the format of compilation inputs and outputs.

Link
PCIe-based Design Example User Guide

Describes the design and implementation for accelerating AI inference using the FPGA AI Suite, Intel® Distribution of OpenVINO™ toolkit, and an Intel® PAC with Arria® 10 GX FPGA or a Terasic* DE10-Agilex Development Board.

Link
SoC-based Design Example User Guide

Describes the design and implementation for accelerating AI inference using the FPGA AI Suite, Intel® Distribution of OpenVINO™ toolkit, and an Arria® 10 SX SoC FPGA Development Kit or Agilex™ 7 FPGA I-Series Transceiver-SoC Development Kit.

Link

Intel® Distribution of OpenVINO™ toolkit Requirement

To use the FPGA AI Suite, you must be familiar with the Intel® Distribution of OpenVINO™ toolkit.

FPGA AI Suite Version 2024.1 requires the Intel® Distribution of OpenVINO™ toolkit Version 2022.3.1 LTS. For OpenVINO™ documentation, refer to https://docs.openvino.ai/2022.3/documentation.html.

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