Intel Agilex® 7 LVDS SERDES User Guide: F-Series and I-Series

ID 721819
Date 12/11/2023
Document Table of Contents

5. Intel Agilex® 7 F-Series and I-Series High-Speed LVDS I/O Implementation Guide

You can implement your high-speed LVDS I/O design using the LVDS SERDES Intel® FPGA IP in the Intel® Quartus® Prime software. The software contains tools for you to create and compile your design, and configure your device.

The Intel® Quartus® Prime software allows you to prepare for device migration, set pin assignments, define placement restrictions, setup timing constraints, and customize the LVDS SERDES IP.