Intel Agilex® 7 LVDS SERDES User Guide: F-Series and I-Series

ID 721819
Date 12/11/2023
Document Table of Contents Edge-Aligned tx_outclock to tx_out

For rising tx_outclock edge-aligned to the MSB of the serial data on tx_out, specify a 0° phase shift.
Figure 8.  0° Edge Aligned tx_outclock ×8 Serializer Waveform with a Division Factor of 8