F-Tile SDI II FPGA IP Design Example User Guide

ID 710496
Date 4/04/2022

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1. F-Tile SDI II Intel FPGA IP Design Example Quick Start Guide

Updated for:
Intel® Quartus® Prime Design Suite 22.1
IP Version 19.2.1
The SDI II Intel® FPGA IP design examples for Intel® Agilex™ F-tile devices feature a simulating testbench and a hardware design that supports compilation and hardware testing.
When you generate a design example, the parameter editor automatically creates the files necessary to simulate, compile, and test the design in hardware.
Note: The support for 22.1 Intel® Agilex™ SDI II Design Example hardware is still in preliminary stage.
Figure 1. Development Stages