F-Tile SDI II FPGA IP Design Example User Guide

ID 710496
Date 4/04/2022

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To run the hardware test, connect the transmitter output pin to receiver input pin directly. To validate whether RX is locked to the signal and receive the video data correctly, the on-board LEDs are used to display the RX status.

You may also connect an SDI signal analyzer to the transmitter output pin to view the generated image.

Figure 24. Intel Agilex I-Series SoC Development Kit User LEDs
Table 13.  On-board LED Functions
LEDs Functions
D2, D4, D6 Indicate the receiver video standard.
D8 Shows the slower version of TX transceiver parallel clock.
D7 Shows the slower version of RX transceiver parallel clock.
D1 Illuminates when align_locked signal is asserted.
D3 Illuminates when trs_locked signal is asserted
D5 Illuminates when frame_locked signal is asserted.
Table 14.  D3-D5 LED status and its video standard on Agilex I-series SoC Development Kit
D2, D4, D6 Video standard
000 SD
001 HD
010 3G Level B 10-bit Multiplex
011 3G Level A 10-bit Multiplex
100 6G 10-bit Multiplex Type 2
101 6G 10-bit Multiplex Type 1
110 12G 10-bit Multiplex Type 2
111 12G 10-bit Multiplex Type 1

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