4G Turbo-V Intel® FPGA IP User Guide

ID 683882
Date 4/01/2024
Document Table of Contents

1. About the 4G Turbo-V Intel® FPGA IP

Updated for:
Intel® Quartus® Prime Design Suite 24.1
IP Version 2.0.4
Forward-error correction (FEC) channel codes commonly improve the energy efficiency of wireless communication systems. Turbo codes are suitable for 3G and 4G mobile communications (e.g., in UMTS and LTE) and satellite communications. You can use Turbo codes in other applications that require reliable information transfer over bandwidth- or latency-constrained communication links in the presence of data-corrupting noise. The 4G Turbo-V Intel® FPGA IP comprises a downlink and uplink accelerator for vRAN and includes the Turbo Intel® FPGA IP. The downlink accelerator adds redundancy to the data in the form of parity information.The uplink accelerator exploits redundancy to correct a reasonable number of channel errors.