1.4. 4G Turbo-V Performance and Resource Utilization
Intel generated the resource utilization and performance by compiling the designs with Intel Quartus Prime software v23.2. Only use these approximate results for early estimation of FPGA resources (e.g. adaptive logic modules (ALMs)) that a project requires.
Family | Device | Average fMAX (MHz) 1 | ALM | M20K | DSP |
---|---|---|---|---|---|
Agilex™ 5 | SM7_PART_4S | 248 | 8.1k | 51 | 6 |
A5EC065BB32AE5SR0 | 204 | 8.2k | 51 | 6 | |
A5EC065BB32AE6SR0 | 189 | 8.2k | 51 | 6 | |
Agilex™ 7 | AGFB014R24B1E1V | 430 | 8.7k | 51 | 6 |
AGFB014R24B2E2V | 382 | 8.7k | 51 | 6 | |
AGFB014R24B2E3V | 328 | 8.7k | 51 | 6 | |
AGFB014R24B2E3E
|
328 | 8.7k | 51 | 6 | |
AGFB014R24B2E4X | 243 | 8.7k | 51 | 6 | |
AGFB014R24B2E4F | 243 | 8.7k | 51 | 6 | |
AGFB014R24B1I1V | 430 | 8.7k | 51 | 6 | |
AGFB014R24B2I2V | 382 | 8.7k | 51 | 6 | |
AGFB014R24B2I3V | 328 | 8.7k | 51 | 6 | |
AGFB014R24B2I3E | 328 | 8.7k | 51 | 6 | |
Intel Arria 10 | 10AT115S1F45E1SG | 288 | 7.7k | 51 | 6 |
Intel Stratix 10 | 1SG280HU2F50E2VG | 275 | 8.4k | 51 | 6 |
1SG280HU2F50E2LG | 263 | 8.4k | 51 | 6 |
Family | Device | Average fMAX (MHz) 2 | ALM | M20K | DSP |
---|---|---|---|---|---|
Agilex™ 5 | SM7_PART_4S | 302 | 26.6k | 45 | 0 |
A5EC065BB32AE5SR0 | 252 | 26.3k | 45 | 0 | |
A5EC065BB32AE6SR0 | 231 | 26.3k | 45 | 0 | |
Agilex™ 7 | AGFB014R24B1E1V | 519 | 28.8k | 45 | 0 |
AGFB014R24B2E2V | 460 | 28.8k | 45 | 0 | |
AGFB014R24B2E3V | 414 | 28.8k | 45 | 0 | |
AGFB014R24B2E3E
|
414 | 28.8k | 45 | 0 | |
AGFB014R24B2E4X | 362 | 28.8k | 45 | 0 | |
AGFB014R24B2E4F | 324 | 28.8k | 45 | 0 | |
AGFB014R24B1I1V | 515 | 28.8k | 45 | 0 | |
AGFB014R24B2I2V | 461 | 28.8k | 45 | 0 | |
AGFB014R24B2I3V | 417 | 28.8k | 45 | 0 | |
AGFB014R24B2I3E | 417 | 28.8k | 45 | 0 | |
Intel Arria 10 | 10AT115S1F45E1SG | 304 | 23.8k | 45 | 0 |
Intel Stratix 10 | 1SG280HU2F50E2VG | 304 | 28.1k | 45 | 0 |
1SG280HU2F50E2LG | 283 | 28.0k | 45 | 0 |
1 Reduced 15% for margin
2 Reduced 15% for margin