E-Tile Hard IP Intel Agilex® 7 Design Example User Guide: Ethernet, E-tile CPRI PHY and Dynamic Reconfiguration
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4.1.5. Testing the E-tile Dynamic Reconfiguration Hardware Design Example
- 10G/25G with PTP and optional RS-FEC
- 10G/25G with optional RS-FEC
- 10G/24G CPRI with optional RS-FEC
- 9.8G CPRI
- 25G Ethernet with PTP and optional RS-FEC to CPRI
For hardware information related to 100G Ethernet MAC+PCS with optional RS-FEC variant, refer to the 100GE DR Hardware Design Examples section.
After you compile the E-Tile Dynamic Reconfiguration Design Example and configure it on your device, you can use the Nios® II Software Build Tools (SBT) for Eclipse to compile and test the design in hardware.