Arria® 10 GX, GT, and SX Device Family Pin Connection Guidelines

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ID 683814
Date 7/23/2025
Public
Document Table of Contents
Document Table of Contents x
1. Arria® 10 GX, GT, and SX Device Family Pin Connection Guidelines
1. Arria® 10 GX, GT, and SX Device Family Pin Connection Guidelines x
1.1. Arria® 10 GX and GT Pin Connection Guidelines 1.2. Arria® 10 SX Pin Connection Guidelines 1.3. Power Supply Sharing Guidelines for Arria® 10 Devices 1.4. Document Revision History for the Arria® 10 GX, GT, and SX Device Family Pin Connection Guidelines
1.1. Arria® 10 GX and GT Pin Connection Guidelines x
1.1.1. Clock and PLL Pins 1.1.2. Dedicated Configuration/JTAG Pins 1.1.3. Optional/Dual-Purpose Configuration Pins 1.1.4. Partial Reconfiguration Pins 1.1.5. 3V Compatible I/O Pins 1.1.6. Differential I/O Pins 1.1.7. External Memory Interface and Hard Memory PHY Pins 1.1.8. Reference Pins 1.1.9. Voltage Sensor Pins 1.1.10. Supply Pins 1.1.11. Transceiver Pins 1.1.12. Notes to Arria® 10 GX and GT Pin Connection Guidelines
1.2. Arria® 10 SX Pin Connection Guidelines x
1.2.1. HPS Supply Pins 1.2.2. HPS Dedicated I/O Bank Pins 1.2.3. HPS Peripheral Pins 1.2.4. Shared 3V I/O Bank Pins 1.2.5. Notes to Arria® 10 SX Pin Connection Guidelines
1.3. Power Supply Sharing Guidelines for Arria® 10 Devices x
1.3.1. Example 1— Arria® 10 GX 1.3.2. Example 2— Arria® 10 GX 1.3.3. Example 3— Arria® 10 GX 1.3.4. Example 4— Arria® 10 GT 1.3.5. Example 5— Arria® 10 GT 1.3.6. Example 6— Arria® 10 GT 1.3.7. Example 7— Arria® 10 GT 1.3.8. Example 8— Arria® 10 SX 1.3.9. Example 9— Arria® 10 SX 1.3.10. Example 10— Arria® 10 SX 1.3.11. Example 11— Arria® 10 GX (Using the SmartVID Feature) 1.3.12. Notes to Power Supply Sharing Guidelines
1. Arria® 10 GX, GT, and SX Device Family Pin Connection Guidelines

1.1.5. 3V Compatible I/O Pins

Note: Altera recommends that you create a Quartus® Prime design, enter your device I/O assignments, and compile the design. The Quartus® Prime software checks your pin connections according to I/O assignment and placement rules. The rules differ from one device to another based on device density, package, I/O assignments, voltage assignments, and other factors that are not fully described in this document or the device handbook.
Table 5.  3V Compatible I/O Pins
Pin Name Pin Functions Pin Description Connection Guidelines
DIFFIO2[H,L]_[1:24][p,n] I/O

These are the 3.0 V I/O pins. These pins support 1.2 V, 1.25 V, 1.35 V, 1.5 V, 1.8 V, 2.5 V, and 3.0 V I/O standards.

For details about the supported I/O standards, refer to the Arria® 10 Device Datasheet.

Connect these pins according to the I/O interface standard you are using.

Connect unused pins as defined in the Quartus® Prime software.

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