Arria® 10 GX, GT, and SX Device Family Pin Connection Guidelines

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ID 683814
Date 7/23/2025
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Document Table of Contents
Document Table of Contents x
1. Arria® 10 GX, GT, and SX Device Family Pin Connection Guidelines
1. Arria® 10 GX, GT, and SX Device Family Pin Connection Guidelines x
1.1. Arria® 10 GX and GT Pin Connection Guidelines 1.2. Arria® 10 SX Pin Connection Guidelines 1.3. Power Supply Sharing Guidelines for Arria® 10 Devices 1.4. Document Revision History for the Arria® 10 GX, GT, and SX Device Family Pin Connection Guidelines
1.1. Arria® 10 GX and GT Pin Connection Guidelines x
1.1.1. Clock and PLL Pins 1.1.2. Dedicated Configuration/JTAG Pins 1.1.3. Optional/Dual-Purpose Configuration Pins 1.1.4. Partial Reconfiguration Pins 1.1.5. 3V Compatible I/O Pins 1.1.6. Differential I/O Pins 1.1.7. External Memory Interface and Hard Memory PHY Pins 1.1.8. Reference Pins 1.1.9. Voltage Sensor Pins 1.1.10. Supply Pins 1.1.11. Transceiver Pins 1.1.12. Notes to Arria® 10 GX and GT Pin Connection Guidelines
1.2. Arria® 10 SX Pin Connection Guidelines x
1.2.1. HPS Supply Pins 1.2.2. HPS Dedicated I/O Bank Pins 1.2.3. HPS Peripheral Pins 1.2.4. Shared 3V I/O Bank Pins 1.2.5. Notes to Arria® 10 SX Pin Connection Guidelines
1.3. Power Supply Sharing Guidelines for Arria® 10 Devices x
1.3.1. Example 1— Arria® 10 GX 1.3.2. Example 2— Arria® 10 GX 1.3.3. Example 3— Arria® 10 GX 1.3.4. Example 4— Arria® 10 GT 1.3.5. Example 5— Arria® 10 GT 1.3.6. Example 6— Arria® 10 GT 1.3.7. Example 7— Arria® 10 GT 1.3.8. Example 8— Arria® 10 SX 1.3.9. Example 9— Arria® 10 SX 1.3.10. Example 10— Arria® 10 SX 1.3.11. Example 11— Arria® 10 GX (Using the SmartVID Feature) 1.3.12. Notes to Power Supply Sharing Guidelines
1. Arria® 10 GX, GT, and SX Device Family Pin Connection Guidelines

1.2.3. HPS Peripheral Pins

Note: Altera recommends that you create a Quartus® Prime design, enter your device I/O assignments, and compile the design. The Quartus® Prime software checks your pin connections according to I/O assignment and placement rules. The rules differ from one device to another based on device density, package, I/O assignments, voltage assignments, and other factors that are not fully described in this document or the device handbook.
Table 14.  HPS Peripheral Pins
HPS Pin Name Pin Type Pin Functions1 Pin Description Connection Guidelines
HPS_DEDICATED_4 I/O Pin Mux Select 4 QSPI CLK

When configured as the QSPI Clock and if a single memory topology is used, connect a 50-Ω series termination resistor near this Arria® 10 SoC FPGA device pin. For other topologies, use a 25-Ω series termination resistor.

When you are booting the HPS from a SD/MMC/eMMC device, pull this pin high on the board with a weak pull-up resistor such as 10-kΩ.

If unused, program it in the Quartus® Prime software as an input with a weak pull-up.

Pin Mux Select 8 SDMMC Data Bit 0
Pin Mux Select 14 NAND Data Bit 0
Pin Mux Select 15 GPIO 2 Bit 0
HPS_DEDICATED_5 I/O Pin Mux Select 4 QSPI Data IO Bit 0

When you are booting the HPS from a SD/MMC/eMMC device, pull this pin high on the board with a weak pull-up resistor such as 10-kΩ.

If unused, program it in the Quartus® Prime software as an input with a weak pull-up.
Pin Mux Select 8 SDMMC Command Line
Pin Mux Select 14 NAND Data Bit 1
Pin Mux Select 152 GPIO 2 Bit 1
BOOTSEL2 (BSEL2)/ HPS_DEDICATED_6 I/O Pin Mux Select 4 QSPI Slave Select 0

Connect a 4.7-kΩ pull-up or pull-down resistor to the pin to select the desired boot select values. For more information about the boot select values, refer to the Booting and Configuration appendix in the Arria® 10 Hard Processor System Technical Reference Manual.

This is a multi-function pin. The HPS Boot ROM samples the value of the BSEL from this pin upon power up. After boot up, this pin functions according to the settings in the Platform Designer.

This resistor cannot interfere with the slow speed interface signals that could share this pin.
Pin Mux Select 8 SDMMC Clock Out
Pin Mux Select 14 NAND Write Enable

Refer to note 19 in the Notes to Arria® 10 SX Pin Connection Guidelines section.

Pin Mux Select 152 GPIO 2 Bit 2
HPS_DEDICATED_7 I/O Pin Mux Select 4 QSPI Data IO Bit 1

When you are booting the HPS from a SD/MMC/eMMC device, pull this pin high on the board with a weak pull-up resistor such as 10-kΩ.

If unused, program it in the Quartus® Prime software as an input with a weak pull-up.
Pin Mux Select 8 SDMMC Data Bit 1
Pin Mux Select 14 NAND Read Enable

Refer to note 19 in the Notes to Arria® 10 SX Pin Connection Guidelines section.

Pin Mux Select 152 GPIO 2 Bit 3
HPS_DEDICATED_8 I/O Pin Mux Select 4 QSPI Data IO Bit 2/ Write Protect

Refer to note 19 in the Notes to Arria® 10 SX Pin Connection Guidelines section.

When you are booting the HPS from a SD/MMC/eMMC device, pull this pin high on the board with a weak pull-up resistor such as 10-kΩ.

If unused, program it in the Quartus® Prime software as an input with a weak pull-up.
Pin Mux Select 8 SDMMC Data Bit 2
Pin Mux Select 14 NAND Data Bit 2
Pin Mux Select 152 GPIO 2 Bit 4
HPS_DEDICATED_9 I/O Pin Mux Select 4 QSPI Data IO Bit 3/ Hold

When you are booting the HPS from a SD/MMC/eMMC device, pull this pin high on the board with a weak pull-up resistor such as 10-kΩ.

The SD card has an internal pull-up on the SDMMC Data Bit 3 which can be disabled in the software using the SET_CLR_CARD_DETECT (ACMD42) command. This is not applicable for the MMC/eMMC flash.

If unused, program it in the Quartus® Prime software as an input with a weak pull-up.
Pin Mux Select 8 SDMMC Data Bit 3
Pin Mux Select 14 NAND Data Bit 3
Pin Mux Select 152 GPIO 2 Bit 5
BOOTSEL1 (BSEL1)/ HPS_DEDICATED_10 I/O Pin Mux Select 2 SPIS0 Master In Slave Out

Connect a 4.7-kΩ pull-up or pull-down resistor to the pin to select the desired boot select values. For more information about the boot select values, refer to the Booting and Configuration appendix in the Arria® 10 Hard Processor System Technical Reference Manual.

This is a multi-function pin. The HPS Boot ROM samples the value of the BSEL from this pin upon power up. After boot up, this pin functions according to the settings in the Platform Designer.

This resistor cannot interfere with the slow speed interface signals that could share this pin.
Pin Mux Select 3 SPIM0 Slave Select 1

Refer to note 19 in the Notes to Arria® 10 SX Pin Connection Guidelines section.

Pin Mux Select 8 SDMMC Power Enable

Refer to note 15 in the Notes to Arria® 10 SX Pin Connection Guidelines section.

Pin Mux Select 14 NAND Command Latch Enable
Pin Mux Select 152 GPIO 2 Bit 6
BOOTSEL0 (BSEL0)/ HPS_DEDICATED_11 I/O Pin Mux Select 3 SPIM 0 Clock

Connect a 4.7-kΩ pull-up or pull-down resistor to the pin to select the desired boot select values. For more information about the boot select values, refer to the Booting and Configuration appendix in the Arria® 10 Hard Processor System Technical Reference Manual.

This is a multi-function pin. The HPS Boot ROM samples the value of the BSEL from this pin upon power up. After boot up, this pin functions according to the settings in the Platform Designer.

This resistor cannot interfere with the slow speed interface signals that could share this pin.
Pin Mux Select 4 PLL Clock 0
Pin Mux Select 8 QSPI Slave Select 1
Pin Mux Select 14 NAND Address Latch Enable
Pin Mux Select 152 GPIO 2 Bit 7
HPS_DEDICATED_12 I/O Pin Mux Select 0 I2C EMAC1 Serial Data

If used as the NAND Ready/Busy input, connect this pin through a pull-up resistor to VCCIO_HPS in the dedicated I/O bank which the NAND_RB pin resides. For more information of the pull-up resistor value, refer to the NAND flash specification.

When you are booting the HPS from a MMC/eMMC device, pull this pin high on the board with a weak pull-up resistor such as 10-kΩ.

If unused, program it in the Quartus® Prime software as an input with a weak pull-up.

Pin Mux Select 1 EMAC1 MDIO
Pin Mux Select 3 SPIM0 Master Out Slave In
Pin Mux Select 4 PLL Clock 1
Pin Mux Select 8 SDMMC Data Bit 4
Pin Mux Select 13 UART1 Transmit
Pin Mux Select 14 NAND Ready/Busy
Pin Mux Select 152 GPIO 2 Bit 8
HPS_DEDICATED_13 I/O Pin Mux Select 0 I2C EMAC1 Serial Clock

When you are booting the HPS from a MMC/eMMC device, pull this pin high on the board with a weak pull-up resistor such as 10-kΩ.

If unused, program it in the Quartus® Prime software as an input with a weak pull-up.
Pin Mux Select 1 EMAC1 MDC
Pin Mux Select 3 SPIM0 Master In Slave Out
Pin Mux Select 4 PLL Clock 2
Pin Mux Select 8 SDMMC Data Bit 5
Pin Mux Select 13 UART1 Request to Send

Refer to note 19 in the Notes to Arria® 10 SX Pin Connection Guidelines section.

Pin Mux Select 14 NAND Chip Enable

Refer to note 19 in the Notes to Arria® 10 SX Pin Connection Guidelines section.

Pin Mux Select 152 GPIO 2 Bit 9
HPS_DEDICATED_14 I/O Pin Mux Select 0 I2C EMAC2 Serial Data

When you are booting the HPS from a MMC/eMMC device, pull this pin high on the board with a weak pull-up resistor such as 10-kΩ.

If unused, program it in the Quartus® Prime software as an input with a weak pull-up.
Pin Mux Select 1 EMAC2 MDIO
Pin Mux Select 3 SPIM0 Slave Select 0

Refer to note 19 in the Notes to Arria® 10 SX Pin Connection Guidelines section.

Pin Mux Select 4 PLL Clock 3
Pin Mux Select 8 SDMMC Data Bit 6
Pin Mux Select 13 UART1 Clear to Send

Refer to note 19 in the Notes to Arria® 10 SX Pin Connection Guidelines section.

Pin Mux Select 14 NAND Data Bit 4
Pin Mux Select 152 GPIO 2 Bit 10
HPS_DEDICATED_15 I/O Pin Mux Select 0 I2C EMAC2 Serial Clock

When you are booting the HPS from a MMC/eMMC device, pull this pin high on the board with a weak pull-up resistor such as 10-kΩ.

If unused, program it in the Quartus® Prime software as an input with a weak pull-up.
Pin Mux Select 1 EMAC2 MDC
Pin Mux Select 2 SPIS0 Clock
Pin Mux Select 4 PLL Clock 4
Pin Mux Select 8 SDMMC Data Bit 7
Pin Mux Select 13 UART1 Receive
Pin Mux Select 14 NAND Data Bit 5
Pin Mux Select 152 GPIO 2 Bit 11
HPS_DEDICATED_16 I/O Pin Mux Select 0 I2C EMAC0 Serial Data If unused, program it in the Quartus® Prime software as an input with a weak pull-up.
Pin Mux Select 1 EMAC0 MDIO
Pin Mux Select 2 SPIS0 Master Out Slave In
Pin Mux Select 8 QSPI Slave Select 2
Pin Mux Select 13 UART1 Transmit
Pin Mux Select 14 NAND Data Bit 6
Pin Mux Select 152 GPIO 2 Bit 12
HPS_DEDICATED_17 I/O Pin Mux Select 0 I2C EMAC0 Serial Clock If unused, program it in the Quartus® Prime software as an input with a weak pull-up.
Pin Mux Select 1 EMAC0 MDC
Pin Mux Select 2 SPIS0 Slave Select 0

Refer to note 19 in the Notes to Arria® 10 SX Pin Connection Guidelines section.

Pin Mux Select 8 QSPI Slave Select 3
Pin Mux Select 13 UART1 Receive
Pin Mux Select 14 NAND Data Bit 7
Pin Mux Select 152 GPIO 2 Bit 13
1 Refer to notes 11, 12, and 13 in the Notes to Arria® 10 SX Pin Connection Guidelines section.
2 Refer to note 14 in the Notes to Arria® 10 SX Pin Connection Guidelines section.
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