Intel® Arria® 10 GX, GT, and SX Device Family Pin Connection Guidelines

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ID 683814
Date 1/14/2022
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Document Table of Contents
Document Table of Contents x
Intel® Arria® 10 GX, GT, and SX Device Family Pin Connection Guidelines
Intel® Arria® 10 GX, GT, and SX Device Family Pin Connection Guidelines x
Intel® Arria® 10 GX and GT Pin Connection Guidelines Intel® Arria® 10 SX Pin Connection Guidelines Power Supply Sharing Guidelines for Intel® Arria® 10 Devices Document Revision History for the Intel® Arria® 10 GX, GT, and SX Device Family Pin Connection Guidelines
Intel® Arria® 10 GX and GT Pin Connection Guidelines x
Clock and PLL Pins Dedicated Configuration/JTAG Pins Optional/Dual-Purpose Configuration Pins Partial Reconfiguration Pins 3V Compatible I/O Pins Differential I/O Pins External Memory Interface and Hard Memory PHY Pins Reference Pins Voltage Sensor Pins Supply Pins Transceiver Pins Notes to Intel® Arria® 10 GX and GT Pin Connection Guidelines
Intel® Arria® 10 SX Pin Connection Guidelines x
HPS Supply Pins HPS Dedicated I/O Bank Pins HPS Peripheral Pins Shared 3V I/O Bank Pins Notes to Intel® Arria® 10 SX Pin Connection Guidelines
Power Supply Sharing Guidelines for Intel® Arria® 10 Devices x
Example 1— Intel® Arria® 10 GX Example 2— Intel® Arria® 10 GX Example 3— Intel® Arria® 10 GX Example 4— Intel® Arria® 10 GT Example 5— Intel® Arria® 10 GT Example 6— Intel® Arria® 10 GT Example 7— Intel® Arria® 10 GT Example 8— Intel® Arria® 10 SX Example 9— Intel® Arria® 10 SX Example 10— Intel® Arria® 10 SX Example 11— Intel® Arria® 10 GX (Using the SmartVID Feature) Notes to Power Supply Sharing Guidelines
Intel® Arria® 10 GX, GT, and SX Device Family Pin Connection Guidelines

HPS Supply Pins

Note: Intel® recommends that you create a Intel® Quartus® Prime design, enter your device I/O assignments, and compile the design. The Intel® Quartus® Prime software will check your pin connections according to I/O assignment and placement rules. The rules differ from one device to another based on device density, package, I/O assignments, voltage assignments, and other factors that are not fully described in this document or the device handbook.
Table 12.  HPS Supply Pins
HPS Pin Name Pin Functions Pin Description Connection Guidelines
VCCL_HPS Power VCCL_HPS supplies power to the HPS core.

Connect all VCCL_HPS pins to a 0.9V or 0.95V low noise switching regulator. For more information about the voltage requirements for various operating temperatures and speed grades, refer to the Maximum HPS Clock Frequencies Across Device Speed Grade for Intel® Arria® 10 Devices table in the Intel® Arria® 10 Device Datasheet.

Use the Intel® Arria® 10 Early Power Estimator (EPE) to determine the current requirements for VCCL_HPS and other power supplies. Decoupling for these pins depends on the design decoupling requirements of the specific board. See Notes 2, 3, 4, and 6.

VCCIO_HPS Power HPS dedicated I/Os can support a different voltage level from 1.8V to 3.0V. The supported I/O standard is LVTTL/ LVCMOS (3.0, 2.5, 1.8).

Connect these pins to a 1.8V, 2.5V, or 3.0V power supply, depending on the I/O standard required by the specified bank. If these pins have the same voltage requirement as VCCIO and VCCPGM, you have the option to source VCCIO_HPS pins from the same regulator as VCCIO and VCCPGM.

Decoupling for these pins depends on the design decoupling requirements of the specific board. See Notes 2, 3, 4, and 8.

VCCPLL_HPS Power VCCPLL_HPS supplies analog power to the HPS core PLLs.

Connect these pins to a 1.8V low noise switching power supply through a proper isolation filter. Share VCCPLL_HPS with the same regulator as VCCPT when all power rails require 1.8V but only with a proper isolation filter.

Decoupling for these pins depends on the design decoupling requirements of the specific board. See Notes 2, 3, 4, and 7.

VCCIOREF_HPS Power HPS power supply for I/O pre-drivers.

The VCCIOREF_HPS pins require 1.8V. When these pins have the same voltage requirements as VCCIO_HPS, you have the option to tie them to the same regulator. If these pins have the same voltage requirement as VCCPT, you have the option to tie them to the same regulator.

Decoupling for these pins depends on the design decoupling requirements of the specific board. See Notes 2, 3, 4, and 8.

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