Intel® FPGA Programmable Acceleration Card D5005 Board Management Controller User Guide

ID 683811
Date 11/04/2019

2.1. SMBus Slave Address

  • Two SMBus slave addresses:
    • MCTP endpoint slave address: 0xCE by default. It can be reprogrammed into corresponding section of external FPGA Quad SPI flash via in-band way if necessary
    • Standard I2C slave address: 0xBC by default only for out-of-band accesses.
  • SMBus device category:
    Table 1.  SMBus device category
    Device Category Description
    2'b00 Non-ARP capable
    2'b01 Fixed, not discoverable (by default)
    2'b10 Fixed and Discoverable
    2'b11 ARP-capable, but only "Dynamic and volatile address device" is supported

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