1. Intel FPGA Programmable Acceleration Card D5005 BMC Introduction 2. PLDM over MCTP SMBus 3. EEPROM Data Format 4. Revision History

1.1. About this document 1.2. Overview 1.3. Root of Trust (RoT) 1.4. Power Sequence Management 1.5. Board Monitoring Through Sensors 1.6. Secure Remote System Update 1.7. FRUID EEPROM 1.8. MAC Address EEPROM

2.1. SMBus Slave Address 2.2. SMBus Interface Speed 2.3. MCTP Packetization Support 2.4. Supported Command Sets 2.5. PLDM Topology and Hierarchy 2.6. Board Monitoring through I2C SMBus