Intel® FPGA Programmable Acceleration Card D5005 Board Management Controller User Guide

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ID 683811
Date 11/04/2019
Public
Document Table of Contents
Document Table of Contents x
1. Intel FPGA Programmable Acceleration Card D5005 BMC Introduction 2. PLDM over MCTP SMBus 3. EEPROM Data Format 4. Revision History
1. Intel FPGA Programmable Acceleration Card D5005 BMC Introduction x
1.1. About this document 1.2. Overview 1.3. Root of Trust (RoT) 1.4. Power Sequence Management 1.5. Board Monitoring Through Sensors 1.6. Secure Remote System Update 1.7. FRUID EEPROM 1.8. MAC Address EEPROM
2. PLDM over MCTP SMBus x
2.1. SMBus Slave Address 2.2. SMBus Interface Speed 2.3. MCTP Packetization Support 2.4. Supported Command Sets 2.5. PLDM Topology and Hierarchy 2.6. Board Monitoring through I2C SMBus
1. Intel FPGA Programmable Acceleration Card D5005 BMC Introduction
2. PLDM over MCTP SMBus
3. EEPROM Data Format
4. Revision History

2.5. PLDM Topology and Hierarchy

Defined Platform Descriptor Records

The Intel® FPGA PAC D5005 uses 43 Platform Descriptor Records (PDRs). For QSFP module plug/unplug event, the BMC firmware uses another sensor that indicates if the QSFP is plugged or not, and then returns Normal for this sensor even if unplugged.

Sensor Names and Record Handle

All PDRs are assigned an opaque numeric value called the Record Handle. This value is used for accessing individual PDRs within the PDR Repository via GetPDR (DTMF specification DSP0248).

The following table is a consolidated list of sensors monitored on Intel® FPGA PAC D5005.

Table 2.  PDRs Sensor Names and Record Handle
Function Sensor Name PDR Record Handle
Total Intel® FPGA PAC input power N/A 1
PCIe* fingers 12V Current 12 V Backplane Current 2
PCIe* fingers 12V Voltage 12 V Backplane Voltage 3
1.2 V Rail Voltage N/A 4
1.2 V Rail Current N/A 5
1.8 V Rail Voltage 1.8 V Voltage 6
1.8 V Rail Current 1.8 V Current 7
3.3 V Rail Voltage 3.3 V Voltage 8
3.3 V Rail Current 3.3 V Current 9
FPGA Core Voltage FPGA Core Voltage 10
FPGA Core Current FPGA Core Current 11
FPGA Core Temperature FPGA Core Temperature 12
Board Temperature N/A 13
QSFP 3.3V Rail QSFP0 Voltage 14
QSFP Temperature QSFP0 Temperature 15
Core Supply Temp N/A 16
Core Intel® FPGA PAC supply temp input N/A 17
VCCR Rail Voltage VCCR Voltage 18
VCCT Rail Voltage VCCT Voltage 19
VCCR Rail Current VCCR Current 20
VCCT Rail Current VCCT Current 21
VPP Rail Voltage N/A 22
VTT Rail Voltage N/A 23
PCIe* Auxillary 12 V Current 12 V AUX Current 24
PCIe* Auxillary 12 V Voltage 12 V AUX Voltage 25
PCIe* Auxillary 12 V Temperature 12 V AUX Temperature 26
PCIe* fingers 12V Temperature 12 V Backplane Temperature 27
3.3 V Rail Temperature 3.3 V Temperature 28
1.8 V Rail Temperature 1.8 V Temperature 29
VCCERAM Rail Current VCCERAM Current 30
VCCERAM Rail Voltage VCCERAM Voltage 31
VCCERAM Rail Temperature VCCERAM Temperature 32
VCCR_GXB Regulator Temperature VCCR Temperature 33
FPGA Transceiver Die Temperature FPGA Transceiver Temperature 34
Board Inlet Air Temperature Board Inlet Air Temperature 35
Board Exhaust Air Temperature Board Exhaust Air Temperature 36
QSFP 3.3 V Rail QSFP1 Voltage 37
QSFP Temperature QSFP1 Temperature 38
DDR4 Module 0 Temperature RDIMM0 Temperature 39
DDR4 Module 1 Temperature RDIMM1 Temperature 40
DDR4 Module 2 Temperature RDIMM2 Temperature 41
DDR4 Module 3 Temperature RDIMM3 Temperature 42
VCCT_GXB Regulator Temperature VCCT Temperature 43
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