AN 522: Implementing Bus LVDS Interface in Supported Intel® FPGA Device Families

ID 683803
Date 7/31/2018

BLVDS Overview

Typical multipoint BLVDS system consists of a number of transmitter and receiver pairs (transceivers) that are connected to the bus.
Figure 1. Multipoint BLVDS

The configuration in the preceding figure provides bidirectional half-duplex communication while minimizing interconnect density. Any transceiver can assume the role of a transmitter, with the remaining transceivers acting as receivers (only one transmitter can be active at a time). Bus traffic control, either through a protocol or hardware solution is typically required to avoid driver contention on the bus. The performance of a multipoint BLVDS is greatly affected by the capacitive loading and termination on the bus.

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