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Ixiasoft
1. Parallel Flash Loader Intel® FPGA IP User Guide
Updated for: |
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Intel® Quartus® Prime Design Suite 23.1 |
IP Version 19.1.0 |
FPGAs’ increasing density requires larger configuration storage. If your system contains a flash memory device, you can use your flash memory as the FPGA configuration storage as well. You can use the PFL IP core in Intel® MAX® devices ( Intel® MAX® 10, MAX® II, and MAX® V devices) or all other FPGAs to program flash memory devices efficiently through the JTAG interface and to control configuration from the flash memory device to the Intel® FPGA.
Section Content
Features
Device Support
Functional Description
Using the PFL IP Core
PFL IP Core In Embedded Systems
Third-party Programmer Support
Parameters
Signals
Specifications
Parallel Flash Loader Intel FPGA IP User Guide Archives
Document Revision History for the Parallel Flash Loader Intel FPGA IP User Guide
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